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datasheet:rp2040

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datasheet:rp2040 [2024/10/12 00:10] – larsdatasheet:rp2040 [2025/07/07 03:21] (current) – [I2C] lars
Line 74: Line 74:
 ===== Peripherals ===== ===== Peripherals =====
  
 +==== IRQ ==== 
 +^ IRQ Number ^ Signal ^ 
 +| 0 | TIMER 0 | 
 +| 1 | TIMER 1 | 
 +| 2 | TIMER 2 | 
 +| 3 | TIMER 3 | 
 +| 4 | PWM WRAP | 
 +| 5 | USB CTRL | 
 +| 6 | XIP | 
 +| 7 | PIO_0 0 | 
 +| 8 | PIO_0 1 | 
 +| 9 | PIO_1 0 | 
 +| 10 | PIO_1 1 | 
 +| 11 | DMA 0 | 
 +| 12 | DMA 1 | 
 +| 13 | IO BANK 0 | 
 +| 14 | IO QSPI | 
 +| 15 | SIO PROC 0 | 
 +| 16 | SIO PROC 1 | 
 +| 17 | CLOCKS | 
 +| 18 | SPI 0 | 
 +| 19 | SPI 1 | 
 +| 20 | UART 0 | 
 +| 21 | UART 1 | 
 +| 22 | ADC FIFO | 
 +| 23 | I2C 0 | 
 +| 24 | I2C 1 | 
 +| 25 | RTC |
 ==== Clocks ==== ==== Clocks ====
  
-ROSC : Ring Oscillator (1.8 - 12 MHz+**__Sources:__** 
 + 
 +GPCLK0-1 (GPIO Muxing) (External clocks or Relaxation oscillators) 
 + 
 +ROSC : Ring Oscillator (1.8 - 12 MHz) 
 + 
 +XOSC : Crystal Oscillator (1 - 15 MHz)  
 + 
 +System PLL : (from XOSC) 
 + 
 +USB-PLL :  (from XOSC) 
 + 
 +**__Provided clocks:__** 
 + 
 +clk_ref = reference clock (runs from ROSC can be switched to XOSC)(Watchdog + Timers) 
 + 
 +clk_sys = sytem clock (max 200 MHz) (Processors, Bus fabric, Memories and Memory mapped Registers) 
 + 
 +clk_peri = peripheral clock (max 200 MHz) (UART + SPI) 
 + 
 +clk_usb = 48 MHz (USB) 
 + 
 +clk_adc = 48 MHz (ADC) 
 + 
 +clk_rtc = 46875 Hz (RTC)
  
 +clk_gpout0-3 = 4 clocks of up to 50 MHz (GPIO Muxing)
  
-clk_ref = reference clock 
-clk_sys = sytem clock (max 133 MHz 
-clk_peri 
-clk_usb = 48 MHz 
-clk_adc = 48 MHz 
-clk_rtc = 46875 Hz 
  
  
Line 121: Line 167:
 === Function select === === Function select ===
 ^ \ ^ F0 ^ F1 ^ F2  ^ F3 ^ F4 ^ F5 ^ F6 ^ F7  ^ F8 ^ F9 ^ F10-31 ^ ^ \ ^ F0 ^ F1 ^ F2  ^ F3 ^ F4 ^ F5 ^ F6 ^ F7  ^ F8 ^ F9 ^ F10-31 ^
 +| GPIO  0 |  | SPI0 RX  | UART0 TX  | I2C0 SDA | PWM0 A | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO  1 |  | SPI0 CSn | UART0 RX  | I2C0 SCL | PWM0 B | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO  2 |  | SPI0 SCK | UART0 CTS | I2C1 SDA | PWM1 A | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 +| GPIO  3 |  | SPI0 TX  | UART0 RTS | I2C1 SCL | PWM1 B | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO  4 |  | SPI0 RX  | UART1 TX  | I2C0 SDA | PWM2 A | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO  5 |  | SPI0 CSn | UART1 RX  | I2C0 SCL | PWM2 B | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 +| GPIO  6 |  | SPI0 SCK | UART1 CTS | I2C1 SDA | PWM3 A | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO  7 |  | SPI0 TX  | UART1 RTS | I2C1 SCL | PWM3 B | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO  8 |  | SPI1 RX  | UART1 TX  | I2C0 SDA | PWM4 A | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 +| GPIO  9 |  | SPI1 CSn | UART1 RX  | I2C0 SCL | PWM4 B | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO 10 |  | SPI1 SCK | UART1 CTS | I2C1 SDA | PWM5 A | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO 11 |  | SPI1 TX  | UART1 RTS | I2C1 SCL | PWM5 B | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 +| GPIO 12 |  | SPI1 RX  | UART0 TX  | I2C0 SDA | PWM6 A | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO 13 |  | SPI1 CSn | UART0 RX  | I2C0 SCL | PWM6 B | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO 14 |  | SPI1 SCK | UART0 CTS | I2C1 SDA | PWM7 A | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 +| GPIO 15 |  | SPI1 TX  | UART0 RTS | I2C1 SCL | PWM7 B | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO 16 |  | SPI0 RX  | UART0 TX  | I2C0 SDA | PWM0 A | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO 17 |  | SPI0 CSn | UART0 RX  | I2C0 SCL | PWM0 B | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 +| GPIO 18 |  | SPI0 SCK | UART0 CTS | I2C1 SDA | PWM1 A | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO 19 |  | SPI0 TX  | UART0 RTS | I2C1 SCL | PWM1 B | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO 20 |  | SPI0 RX  | UART1 TX  | I2C0 SDA | PWM2 A | SIO | PIO0 | PIO1 | CLOCK GPIN0  | USB VBUS EN   |  |
 +| GPIO 21 |  | SPI0 CSn | UART1 RX  | I2C0 SCL | PWM2 B | SIO | PIO0 | PIO1 | CLOCK GPOUT0 | USB OVCUR DET |  |
 +| GPIO 22 |  | SPI0 SCK | UART1 CTS | I2C1 SDA | PWM3 A | SIO | PIO0 | PIO1 | CLOCK GPIN1  | USB VBUS DET  |  |
 +| GPIO 23 |  | SPI0 TX  | UART1 RTS | I2C1 SCL | PWM3 B | SIO | PIO0 | PIO1 | CLOCK GPOUT1 | USB VBUS EN   |  |
 +| GPIO 24 |  | SPI1 RX  | UART1 TX  | I2C0 SDA | PWM4 A | SIO | PIO0 | PIO1 | CLOCK GPOUT2 | USB OVCUR DET |  |
 +| GPIO 25 |  | SPI1 CSn | UART1 RX  | I2C0 SCL | PWM4 B | SIO | PIO0 | PIO1 | CLOCK GPOUT3 | USB VBUS DET  |  |
 +| GPIO 26 |  | SPI1 SCK | UART1 CTS | I2C1 SDA | PWM5 A | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 +| GPIO 27 |  | SPI1 TX  | UART1 RTS | I2C1 SCL | PWM5 B | SIO | PIO0 | PIO1 |              | USB OVCUR DET |  |
 +| GPIO 28 |  | SPI1 RX  | UART0 TX  | I2C0 SDA | PWM6 A | SIO | PIO0 | PIO1 |              | USB VBUS DET  |  |
 +| GPIO 29 |  | SPI1 CSn | UART0 RX  | I2C0 SCL | PWM6 B | SIO | PIO0 | PIO1 |              | USB VBUS EN   |  |
 | QSPI_SCK | XIP SCK |  |  |  |  | SIO |  |  |  |  |  | | QSPI_SCK | XIP SCK |  |  |  |  | SIO |  |  |  |  |  |
 | QSPI_CSn | XIP CSn |  |  |  |  | SIO |  |  |  |  |  | | QSPI_CSn | XIP CSn |  |  |  |  | SIO |  |  |  |  |  |
Line 136: Line 212:
  
 XIP_CTRL: [[https://nomagic.de/datasheet/raspberrypi/rp2040/rp2040-datasheet.html#pf80| Register]]  XIP_CTRL: [[https://nomagic.de/datasheet/raspberrypi/rp2040/rp2040-datasheet.html#pf80| Register]] 
 +
 +^ FRF ^ description ^
 +| 00b | Motorola Serial Peripheral Protocol (SPI) |
 +| 01b | Texas Instruments Serial Protocol (SSP) |
 +| 10b | Nationa Semiconductor Microwire |
 +| 11b | reserved |
 +
  
 === clock === === clock ===
Line 151: Line 234:
   - When SPI_CTRLR0_INST_L is 0, the XIP instruction field is appended to the end of the address for XIP accesses, rather than prepended to the beginning   - When SPI_CTRLR0_INST_L is 0, the XIP instruction field is appended to the end of the address for XIP accesses, rather than prepended to the beginning
   - The reset value of DMARDLR is increased from 0 to 4. The SSI to DMA handshaking on RP2040 requests only single transfers or bursts of four, depending on whether the RX FIFO level has reached DMARDLR, so DMARDLR should not be changed from this value.   - The reset value of DMARDLR is increased from 0 to 4. The SSI to DMA handshaking on RP2040 requests only single transfers or bursts of four, depending on whether the RX FIFO level has reached DMARDLR, so DMARDLR should not be changed from this value.
 +
 +==== I2C ====
 +
 +
 +Features:
 +  * TX Buffer depth = 16
 +  * RX Buffer depth = 16
 +  * max speed = Fast Mode (standard mode = 100kb/s; fast mode = 400 kb/s)
 +
 +The GPIO pads should be configured for:
 +  * pull-up enabled
 +  * slew rate limited
 +  * schmitt trigger enabled
 +
 +Speeds:
 +  * SS == standard speed (100 kHz)
 +  * FS == fast speed (400 kHz)
 ===== abbreviation dictionary ===== ===== abbreviation dictionary =====
  
datasheet/rp2040.1728691806.txt.gz · Last modified: by lars